III-V-MOS: Technology CAD for III-V Semiconductor-based MOSFETs.
Coordinator: Prof. Luca Selmi (IU.NET).
Duration: 01/11/2013 - 31/10/2016
Funding: € 2,900,000 (IU.NET share € 642,000).
Synopsys (Zurich, CH), IBM (Zurich, CH), Global Foundries (Dresden, D),
IMEC (Leuven, BE), Quantumwise (Copenhagen, DE), ETH (Zurich, CH) and
IU.NET units involved: University of Bologna, Modena and Reggio Emilia, Udine. The internal scientific director is Prof. David Esseni.
The project concerns the development of TCAD tools for the numerical
simulation of CMOS-based devices based on III-V materials, the use of
which is potentially expected in the near future for high performance
applications. The aim of the project is to develop, validate and
transfer to the industry accurate physical models and new simulation
methods, which allow for the anticipation of complex quantum mechanisms
and quasi-ballistic transport properties that affect the behavior of
devices in size nanometer-based semiconductors III-V.
E2SWITCH: Energy-Efficient Tunnel FETs Switches and Circuits”
Coordinator: Prof. Adrian Ionescu (EPFL)
Duration: 01/11/2013 - 30/04/2017
Financing: € 4,374,000 (IU.NET share € 350,000)
(Lausanne, CH), IBM (Zurich, CH), IMEC (Leuven, BE), Julich Research
Center (Julich D), ETH (Zurich, CH), Cambridge CMOS Sensors ,
(Lausanne, CH) and IU.NET.
IU.NET units involved: University of Bologna and Udine. The internal scientific director is Prof. Pierpaolo Palestri.
project is concerned with the development of Tunnel FET (TFET) devices
and circuits, and aims to optimize these devices using two technology
platforms based on SiGe-Ge and III-V semiconductors with CMOS
GRADE: Graphene-based devices and Circuits for RF Applications
Coordinator: Prof. Max Lemme (UniversitÓ di Siegen)
Duration: 01/10/2012 - 30/09/2015
Financing: €. 3.651.000 (IU.NET share € 603.000)
University of Siegen, (Siegen, D), KTH (Stockholm, S), Infineon
Technologies (Regensburg, D), IHP (Frankfurt Oder, D), IEMN (Lille, F),
University of Bordeaux Bordeaux, F) and IU.NET.
IU.NET units involved: University of Bologna, Pisa and Udine. The internal scientific director is Prof. Giuseppe Iannaccone.
Description: The design goal is the development of graphene devices, both G-FET and GBT, for high-frequency analog applications.